Hitachi H8/329 Series Hardware Manual page 163

Accordingly, when the timer count matches one of the time constants, the compare-match signal is
not generated until the next period of the clock source. Figure 7-5 shows the timing of the setting
of the compare-match flags.
Ø
TCNT
TCOR
Internal
compare-match
signal
CMF
(2) Output Timing: When a compare-match event occurs, the timer output (TMO0 or TMO1)
changes as specified by the output select bits (OS3 to OS0) in the TCSR. Depending on these bits,
the output can remain the same, change to "0," change to "1," or toggle.
Figure 7-6 shows the timing when the output is set to toggle on compare-match A.
Ø
Internal
compare-match
A signal
Timer output
(TMO)
N
N
Figure 7-5. Setting of Compare-Match Flags
Figure 7-6. Timing of Timer Output
154
N + 1