Hitachi H8/329 Series Hardware Manual page 132

Bit 6—Input Capture Flag B (ICFB): This status bit is set to "1" to flag an input capture B
event. If BUFEB = "0," ICFB indicates that the FRC value has been copied to ICRB. If BUFEB =
"1," ICFB indicates that the old ICRB value has been moved into ICRC and the new FRC value has
been copied to ICRB.
ICFB must be cleared by software. It is set by hardware, however, and cannot be set by software.
Bit 6
ICFB Description
0 To clear ICFB, the CPU must read ICFB after it
has been set to "1," then write a "0" in this bit.
1 This bit is set to 1 when an FTIB input signal causes the FRC value
to be copied to ICRB.
Bit 5—Input Capture Flag C (ICFC): This status bit is set to "1" to flag input of a rising or
falling edge of FTIC as selected by the IEDGC bit. When BUFEA = "0," this indicates capture of
the FRC count in ICRC. When BUFEA = "1," however, the FRC count is not captured, so ICFC
becomes simply an external interrupt flag. In other words, the buffer mode frees FTIC for use as a
general-purpose interrupt signal (which can be enabled or disabled by the ICICE bit).
ICFC must be cleared by software. It is set by hardware, however, and cannot be set by software.
Bit 5
ICFC Description
0 To clear ICFC, the CPU must read ICFC after it
has been set to "1," then write a "0" in this bit.
1 This bit is set to 1 when an FTIC input signal is received.
Bit 4—Input Capture Flag D (ICFD): This status bit is set to "1" to flag input of a rising or
falling edge of FTID as selected by the IEDGD bit. When BUFEB = "0," this indicates capture of
the FRC count in ICRD. When BUFEB = "1," however, the FRC count is not captured, so ICFD
becomes simply an external interrupt flag. In other words, the buffer mode frees FTID for use as a
general-purpose interrupt signal (which can be enabled or disabled by the ICIDE bit).
ICFD must be cleared by software. It is set by hardware, however, and cannot be set by software.
123
(Initial value)
(Initial value)