Section 10. Ram; Overview; Block Diagram; Ram Enable Bit (Rame) In System Control Register (Syscr) - Hitachi H8/329 Series Hardware Manual

Single-chip microcomputer
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10.1 Overview

The H8/329 and H8/328 include 1k byte of on-chip static RAM. The H8/327 has 512 bytes. The
H8/326 has 256 bytes. The on-chip RAM is connected to the CPU by a 16-bit data bus. Both byte
and word access to the on-chip RAM are performed in two states, enabling rapid data transfer and
instruction execution.
The on-chip RAM is assigned to addresses H'FB80 to H'FF7F in the H8/329 and H8/328, addresses
H'FD80 to H'FF7F in the H8/327, and addresses H'FE80 to H'FF7F in the H8/326. The RAME bit
in the system control register (SYSCR) can enable or disable the on-chip RAM, permitting these
addresses to be allocated to external memory instead, if so desired.

10.2 Block Diagram

Figure 10-1 is a block diagram of the on-chip RAM.
Figure 10-1. Block Diagram of On-Chip RAM (H8/329 and H8/328)

Section 10. RAM

Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'FB80
H'FB81
H'FB82
H'FB83
On-chip RAM
H'FF7E
H'FF7F
Even address
Odd address
225

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