Hitachi H8/329 Series Hardware Manual page 204

• Transmitting Multiprocessor Serial Data: See figures 8-5 and 8-6.
• Receiving Multiprocessor Serial Data: Follow the procedure below for receiving
multiprocessor serial data.
1 Initialize
Start receiving
2 Set MPIE bit to "1" in SCR
3 Read RDRF bit in SSR
RDRF = "1"?
Yes
Read receive data from RDR
Own ID?
Yes
Read ORER and FER
bits in SSR
∨
FER
ORER = "1"?
No
4 Read RDRF bit in SSR
RDRF = "1"?
Yes
Read ORER and FER
bits in SSR
Read receive data from RDR
FER +
ORER = "1"?
No
Finished
receiving?
Yes
Clear RE to "0" in SCR
End
Figure 8-10. Sample Flowchart for Receiving Multiprocessor Serial Data
1. SCI initialization: the receive data function of the RxD pin is
selected automatically.
2. ID receive cycle: Set the MPIE bit in the serial control register
(SCR) to "1."
3. SCI status check and ID check: read the serial status register
(SSR), check that RDRF is set to "1," then read receive data
from the receive data register (RDR) and compare with the
processor's own ID. Transition of the RDRF bit from "0" to
"1" can be reported by an RXI interrupt. If the ID does not match
the receive data, set MPIE to "1" again and clear RDRF to "0."
If the ID matches the receive data, clear RDRF to "0."
No
4. SCI status check and data receiving: read SSR, check that
RDRF is set to "1," then read data from the receive data register
(RDR) and write "0" in the RDRF bit. Transition of the RDRF bit
from "0" to "1" can be reported by an RXI interrupt.
5. Receive error handling and break detection: if a receive error
No
occurs, read the ORER and FER bits in SSR to identify the error.
After executing the necessary error handling, clear both ORER
and FER to "0." Receiving cannot resume while ORER or FER
remains set to "1." When a framing error occurs, the RxD pin
can be read to detect the break state.
Yes
No
Yes
5
Error handling
No
195
Start error handling
Yes
FER = "1"?
No
Clear error flags
Return
Yes
Break?
No
Clear RE bit to
"0" in SCR
End