Hitachi H8/329 Series Hardware Manual page 201

In receiving, the SCI operates as follows.
1. The SCI monitors the receive data line and synchronizes internally when it detects a start bit.
2. Receive data are shifted into RSR in order from LSB to MSB.
3. The parity bit and stop bit are received.
After receiving these bits, the SCI makes the following checks:
(a) Parity check: the number of 1s in the receive data must match the even or odd parity setting
of the O/E bit in SMR.
(b) Stop bit check: the stop bit value must be "1." If there are two stop bits, only the first stop
bit is checked.
(c) Status check: RDRF must be "0" so that receive data can be loaded from RSR into RDR.
If these checks all pass, the SCI sets RDRF to "1" and stores the received data in RDR. If one of
the checks fails (receive error), the SCI operates as indicated in table 8-8.
Note: When a receive error flag is set, further receiving is disabled. The RDRF bit is not set to "1."
Be sure to clear the error flags.
4. After setting RDRF to "1," if the RIE bit (receive-end interrupt enable) is set to "1" in SCR, the
SCI requests an RXI (receive-end) interrupt. If one of the error flags (ORER, PER, or FER) is
set to "1" and the RIE bit in SCR is also set to "1," the SCI requests an ERI (receive-error)
interrupt.
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