Hitachi H8/329 Series Hardware Manual page 195

"0" D0
Figure 8-3. Phase Relationship between Clock Output and Transmit Data
(3) Transmitting and Receiving Data
• SCI Initialization: Before transmitting or receiving, software must clear the TE and RE bits to
"0" in the serial control register (SCR), then initialize the SCI as follows.
Note: When changing the communication mode or format, always clear the TE and RE bits to "0"
before following the procedure given below. Clearing TE to "0" sets TDRE to "1" and
initializes the transmit shift register (TSR). Clearing RE to "0," however, does not initialize
the RDRF, PER, FER, and ORER flags and receive data register (RDR), which retain their
previous contents.
When an external clock is used, the clock should not be stopped during initialization or
subsequent operation. SCI operation becomes unreliable if the clock is stopped.
D1 D2 D3 D4
One frame
(Asynchronous Mode)
D5 D6 D7 0/1
186
"1" "1"