Hitachi H8/329 Series Hardware Manual page 316

TCR—Timer Conrol Register
Bit 7
CMIEB CMIEA
Initial value 0
Read/Write R/W
CKS2 CKS1 CKS0 ICKS1 ICKS0 Description
0
0
0
0
0
0
0
1
1
1
1
Timer Overflow Interrupt Enable
0 Overflow interrupt request is disabled.
1 Overflow interrupt request is enabled.
Compare-Match Interrupt Enable A
0 Compare-match A interrupt request is disabled.
1 Compare-match A interrupt request is enabled.
Compare-Match Interrupt Enable B
0 Compare-match B interrupt request is disabled.
1 Compare-match B interrupt request is enabled.
6 5
OVIE CCLR1 CCLR0
0 0
R/W R/W R/W
TCR
0 0 —
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 —
0 1 —
1 0 —
1 1 —
Counter Clear
0 0 Counter is not cleared.
0 1 Cleared by compare-match A.
1 0 Cleared by compare-match B.
1 1 Cleared on rising edge of external reset input.
H'FFD0
4 3 2
CKS2
0 0 0
R/W R/W
STCR
— Timer stopped
— Ø/8 internal clock, falling edge
— Ø/2 internal clock, falling edge
— Ø/64 internal clock, falling edge
— Ø/128 internal clock, falling edge
— Ø/1024 internal clock, falling edge
— Ø/2048 internal clock, falling edge
— Timer stopped
— External clock, rising edge
— External clock, falling edge
— External clock, rising and falling
edges
307
TMR1
1 0
CKS1 CKS0
0 0
R/W R/W
Clock Select