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Table 2–9. Floating-Point Auxiliary Configuration Register Field Descriptions
Bit Position Width Field Name Function
31–27
5
26
1
25
1
24
1
23
1
22
1
21
1
20
1
19
1
18
1
17
1
16
1
15–11
5
10
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
Reserved
DIV0 .S2
Set to 1 when 0 is source to reciprocal operation
UNORD .S2 Set to 1 when NaN is a source to a compare operation
UNDER .S2 Set to 1 when result underflows
INEX .S2
Set to 1 when result differs from what would have been computed had the
exponent range and precision been unbounded; never set with INVAL
OVER .S2
Set to 1 when result overflows
INFO .S2
Set to 1 when result is signed infinity
INVAL .S2
Set to 1 when a signed NaN (SNaN) is a source, NaN is a source in a float-
ing-point to integer conversion, or when infinity is subtracted from infinity
src2 is a denormalized number
DEN2 .S2
src1 is a denormalized number
DEN1 .S2
src2 is NaN
NAN2 .S2
NAN1 .S2
src1 is NaN
Reserved
DIV0 .S1
Set to 1 when 0 is source to reciprocal operation
UNORD .S1 Set to 1 when NaN is a source to a compare operation
UNDER .S1 Set to 1 when result underflows
INEX .S1
Set to 1 when result differs from what would have been computed had the
exponent range and precision been unbounded; never set with INVAL
OVER .S1
Set to 1 when result overflows
INFO .S1
Set to 1 when result is signed infinity
INVAL .S1
Set to 1 when SNaN is a source, NaN is a source in a floating-point to
integer conversion, or when infinity is subtracted from infinity
DEN2 .S1
src2 is a denormalized number
DEN1 .S1
src1 is a denormalized number
NAN2 .S1
src2 is a NaN
NAN1 .S1
src1 is a NaN
TMS320C67x Extensions to the Control Register File
CPU Data Paths and Control
2-17
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