Floating-Point Adder Configuration Register (Fadcr) - Texas Instruments TMS320C6000 Series Reference Manual

TMS320C67x Extensions to the Control Register File
2.7.1

Floating-Point Adder Configuration Register (FADCR)

Figure 2–7. Floating-Point Adder Configuration Register (FADCR)
Fields used by .L2
Fields used by .L1
2-14
The floating-point configuration register (FADCR) contains fields that specify
underflow or overflow, the rounding mode, NaNs, denormalized numbers, and
inexact results for instructions that use the .L functional units. FADCR has a
set of fields specific to each of the .L units, .L1 and .L2. Figure 2–7 shows the
layout of FADCR. The functions of the fields in the FADCR are shown in
Table 2–8.
31
27 26 25
Reserved RMode
R, +0
15
11 10 9
Reserved RMode
R, +0
Legend: R Readable by the MVC instruction
W Writeable by the MVC instruction
+0 Value is zero after reset
21
24 23 22
UNDER
INEX OVER INFO
8 7 6 5
UNDER
INEX OVER INFO
19
20 18
17
INVAL DEN2 DEN1 NAN2
R, W, +0
3
4 2
INVAL DEN2 DEN1 NAN2
R, W, +0
16
NAN1
0
1
NAN1