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Extract and Sign-Extend a Bit Field
src2
1)
2)
dst
3)
Execution
Pipeline
Instruction Type
Delay Slots
3-60
csta
x x x x x x x x
x
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Shifts left by 12 to produce:
1
0
1
0
0
1 1
0
1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Then shifts right by 23 to produce:
1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
If the constant form is used:
if (cond)
src2 ext csta , cstb
else
nop
If the register form is used:
if (cond)
src2 ext src1
else
nop
Pipeline
Stage
E1
Read
src1, src2
Written
dst
Unit in use
.S
Single-cycle
0
x
x
x
1
0 1
0
0
1 1 0 1 x x x x x x x x x x x
x x x x x x x x
x x x 0 0 0 0
dst
, src1
dst
9..5
4..0
cstb – csta
8
7
6
5 4
3
2
1
0
0
0
0
0
0
0
0
0
8
7
6
5 4
3
2
1
0
1 0 1 0 0 1 1 0 1
8
7
6
5 4
3
2
1
0
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