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Load From Memory With a 5-Bit Unsigned Constant Offset or Register Offset
Table 3–13. Data Types Supported by Loads
Table 3–14. Address Generator Options
For LDH(U) and LDB(U) the values are loaded into the 16 and 8 LSBs of dst ,
respectively. For LDH and LDB, the upper 16- and 24-bits, respectively, of dst
values are sign-extended. For LDHU and LDBU loads, the upper 16- and
24-bits, respectively, of dst are zero-filled. For LDW, the entire 32 bits fills dst .
dst can be in either register file, regardless of the .D unit or baseR or offsetR
used. The s bit determines which file dst will be loaded into: s = 0 indicates dst
will be in the A register file and s = 1 indicates dst will be loaded in the B register
file. The r bit should be set to zero.
ld/st
Mnemonic
Field
LDB
0 1 0 Load byte
LDBU
0 0 1 Load byte unsigned
LDH
1 0 0 Load halfword
LDHU
0 0 0 Load halfword unsigned
LDW
1 1 0 Load word
Mode Field
0
1
0
1
0
1
0
0
1
1
0
1
1
1
0
0
1
1
1
1
1
1
1
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
0
1
1
1
0
1
0
Load Data Type
Syntax
*+R[ offsetR ]
*–R[ offsetR ]
*+ +R[ offsetR ]
*– –R[ offsetR ]
*R+ +[ offsetR ]
*R– –[ offsetR ]
*+R[ ucst5 ]
*–R[ ucst5 ]
*+ +R[ ucst5 ]
*– –R[ ucst5 ]
*R+ +[ ucst5 ]
*R– –[ ucst5 ]
TMS320C62x/C67x Fixed-Point Instruction Set
LDB(U)/LDH(U)/LDW
Left
Shift of
SIze
Offset
8
0 bits
8
0 bits
16
1 bit
16
1 bit
32
2 bits
Modification Performed
Positive offset
Negative offset
Preincrement
Predecrement
Postincrement
Postdecrement
Positive offset
Negative offset
Preincrement
Predecrement
Postincrement
Postdecrement
3-67
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