Device Status Register Descriptions - Texas Instruments TMS320C6474 Manual

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3.4

Device Status Register Descriptions

The device status register depicts the device configuration selected upon device reset. Once set, these
bits remain set until a device reset.
Figure 3-1 shows the device configuration register 1 and
through software to configure different components on the device. The configuration is done through the
device configuration DEVCFG register, which is one-time writeable through software. The register is reset
on all hard resets and is locked after the first write.
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3-3. Device Configuration Register (DEVCFG) Field Descriptions
Bit Field
31:3 Reserved
2 CLKS1
1 CLKS0
0 SYSCLKOUTEN
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Reserved
R-00000000000000000000000000000
Figure 3-1. Device Configuration Register (DEVCFG)
Value Description
Reserved
McBSP1 CLKS Select
0 CLKS1 device pin
1 chip_clks from Main.PLL
McBSP0 CLKS Select
0 CLKS0 device pin
1 chip_clks from Main.PLL
SYSCLKOUT Enable
0 No Clock Output
1 Clock output Enabled
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SPRS552F – OCTOBER 2008 – REVISED JULY 2010
Table 3-3 describes the parameters that are set
3 2
CLKS1 CLKS0
R/W-0
:TMS320C6474
TMS320C6474
1 0
SYSCLKOUTEN
R/W-0 R/W-1
Device Configuration 47