Texas Instruments TMS320C6000 Series Reference Manual page 209

ADDDP
Double-Precision Floating-Point Addition
Pipeline
Instruction Type
Delay Slots
Functional Unit
Latency
Example
Before instruction
B1:B0 4021 3333h
A3:A2 C004 0000h
A5:A4 XXXX XXXXh
4-24
Pipeline
Stage E1
Read src1_l
src2_l
Written
Unit in use .L
If dst is used as the source for the ADDDP, CMPEQDP, CMPLTDP,
CMPGTDP, MPYDP, or SUBDP instruction, the number of delay slots can be
reduced by one, because these instructions read the lower word of the DP
source one cycle before the upper word of the DP source.
ADDDP/SUBDP
6
2
ADDDP .L1X B1:B0,A3:A2,A5:A4
3333 3333h 8.6
0000 0000h –2.5
XXXX XXXXh
E2 E3 E4
src1_h
src2_h
.L
7 cycles after instruction
B1:B0 4021 3333h
A3:A2 C004 0000h
A5:A4 4018 6666h
E5 E6 E7
dst_l dst_h
4021 3333h 8.6
0000 0000h –2.5
6666 6666h 6.1