Video Capture Channel X Field 1 Start Register (Vcxstrt1) Field Descriptions - Texas Instruments TMS320C64x DSP Reference Manual

Table 3–16. Video Capture Channel x Field 1 Start Register (VCxSTRT1) Field Descriptions
†
Bit field symval
31–28 Reserved –
27–16 VCYSTART OF(value)
15 SSE
DISABLE
ENABLE
14–12 Reserved –
11–0 VCXSTART OF(value)
VCVBLNKP
† For CSL implementation, use the notation VP_VCxSTRT1_field_symval
SPRU629
†
Value BT.656 or Y/C Mode
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
0–FFFh Starting line number.
Startup synchronization enable bit.
0 Not used.
1 Not used.
0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
0–FFFh VCXSTART bits define
the starting pixel
number. Must be an
even number (LSB is
treated as 0).
Video Capture Registers
Description
Raw Data Mode TSI Mode
Not used. Not used.
Startup Not used.
synchronization is
disabled.
Startup Not used.
synchronization is
enabled.
VCVBLNKP bits Not used.
define the minimum
CAPEN inactive
time to be
interpreted as a
vertical blanking
period.
Video Capture Port 3-59