2-Cycle Dp Instructions - Texas Instruments TMS320C6000 Series Reference Manual

Functional Unit Hazards

6.3.10 2-Cycle DP Instructions

Table 6–25. 2-Cycle DP Execution
Figure 6–18. 2-Cycle DP Instruction Phases
6-46
Two-cycle DP instructions use the E1 and E2 phases of the pipeline to com-
plete their operations (see Table 6–25). The following instructions are two-
cycle DP instructions:
ABSDP
RCPDP
RSQDP
SPDP
The lower and upper 32 bits of the DP source are read on E1 using the src1
and src2 ports, respectively. The lower 32 bits of the DP source are written on
E1 and the upper 32 bits of the DP source are written on E2. The 2-cycle DP
instructions are executed on the .S units. The status is written to the FAUCR
on E1. Figure 6–18 shows the pipeline phases the 2-cycle DP instructions use.
Pipeline
Stage
Read
Written
Unit in use
PG PS PW
E1
src2_l
src2_h
dst_l dst_h
.S
PR DP DC E1
E2
1
delay
E2
slot