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7.1.2
Interrupt Service Table (IST)
Figure 7–1. Interrupt Service Table
When the CPU begins processing an interrupt, it references the interrupt
service table (IST). The IST is a table of fetch packets that contain code for
servicing the interrupts. The IST consists of 16 consecutive fetch packets.
Each interrupt service fetch packet (ISFP) contains eight instructions. A simple
interrupt service routine may fit in an individual fetch packet.
The addresses and contents of the IST are shown in Figure 7–1. Because
each fetch packet contains eight 32-bit instruction words (or 32 bytes), each
address in the table is incremented by 32 bytes (20h) from the one adjacent
to it.
Interrupt service table
(IST)
000h
RESET ISFP
020h
NMI ISFP
040h
Reserved
060h
Reserved
080h
INT4 ISFP
0A0h
INT5 ISFP
0C0h
INT6 ISFP
0E0h
INT7 ISFP
100h
INT8 ISFP
120h
INT9 ISFP
140h
INT10 ISFP
160h
INT11 ISFP
180h
INT12 ISFP
1A0h
INT13 ISFP
1C0h
INT14 ISFP
1E0h
INT15 ISFP
Program memory
Overview of Interrupts
Interrupts
7-5
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