Branch Instructions; Branch Instruction Phases; Branch Execution - Texas Instruments TMS320C6000 Series Reference Manual

Functional Unit Hazards
6.3.9

Branch Instructions

Table 6–24. Branch Execution
Figure 6–16. Branch Instruction Phases
PG PS
6-44
Although branch takes one execute phase, there are five delay slots between
the execution of the branch and execution of the target code (see Table 6–24).
Figure 6–16 shows the pipeline phases used by the branch instruction and
branch target code. The delay slots are shaded.
Pipeline
Stage E1
Read src2
Written
Branch
Taken
Unit in use .S2
PW PR DP DC
Branch
target
PS PW
E1
PG PS PW PR
5 delay slots
PR DP DC
DP DC E1
E1