CPU Data Paths and Control
Figure 2–1. TMS320C62x CPU Data Paths
Data path A
Data path B
2-2
src1
src2
.L1
long dst
long src
ST1
long src
long dst
.S1
src1
src2
src1
.M1
src2
LD1
src1
.D1
DA1
src2
src2
DA2
src1
.D2
LD2
src2
.M2
src1
src2
src1
.S2
long dst
long src
ST2
long src
long dst
.L2
src2
src1
dst
8
8
32
8
Register
file A
dst
(A0–A15)
dst
dst
2X
1X
dst
dst
Register
file B
(B0–B15)
dst
8
32
8
8
dst
Control
register
file
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