Texas Instruments TMS320C6000 Series Reference Manual page 165

SSHL
Shift Left With Saturation
Syntax
Opcode
31 29 28 27
creg z dst
3 5
Description
Execution
Pipeline
Instruction Type
Delay Slots
3-118
SSHL (.unit) src2 , src1 , dst
.unit = .S1 or .S2
Opcode map field used...
src2
src1
dst
src2
src1
dst
23 22 18 17
src2
5
The src2 operand is shifted to the left by the src1 operand. The result is placed
in dst . When a register is used to specify the shift, the five least significant bits
specify the shift amount. Valid values are 0 through 31, and the result of the
shift is invalid if the shift amount is greater than 31. The result of the shift is
saturated to 32 bits. If a saturate occurs, the SAT bit in the CSR is set one cycle
after dst is written.
{
if (cond)
if ( bit(31) through bit(31– src1 ) of src2 are all 1s or all 0s)
dst = src2 << src1 ;
else if ( src2 > 0)
saturate dst to 0x7FFF FFFF;
else if ( src2 < 0)
saturate dst to 0x8000 0000;
}
else nop
Pipeline
E1
Stage
Read src1, src2
Written dst
Unit in use .S
Single-cycle
0
For operand type...
xsint
uint
sint
xsint
ucst5
sint
11
13 12
src1/cst x
5
Unit Opfield
.S1, .S2 100011
.S1, .S2 100010
6 5 4 3 2
op 1 0 0 0
6
1 0
s p