Texas Instruments TMS320C6000 Series Reference Manual page 306

Pipeline Execution of Instruction Types
Table 6–2. Execution Stage Length Description for Each Instruction Type (Continued)
2-Cycle DP
Execution E1 Compute the lower
phases results and write to
register
E2 Compute the upper
results and write to
register
E3
E4
E5
E6
E7
E8
E9
E10
Delay slots
Functional
unit latency
Notes: 1) This table assumes that the condition for each instruction is evaluated as true. If the condition is evaluated as false,
the instruction does not write any results or have any pipeline operation after E1.
2) NOP is not shown and has no operation in any of the execution phases.
6-14
4-Cycle
Read sources and
start computation
Continue
computation
Continue
computation
Complete computa-
tion and write results
to register
1 3
1 1
Instruction Type
INTDP
Read sources and
start computation
Continue
computation
Continue
computation
Continue computa-
tion and write lower
results to register
Complete computa-
tion and write upper
results to register
4
1
DP Compare
Read lower sources
and start computa-
tion
Read upper
sources, finish com-
putation, and write
results to register
1
2