Table of Contents
Advertisement
Figure 2.10 Serial ROM Download
Address High Byte
Register 0xFD05
Device ID 0
R/W
Master
Bit
Slave
ACK
Table 2.1
Initial ROM Download Contents
Byte
Contents
0
Destination address low
1
Destination address high
2
Firmware length (n) low (includes checksum byte but not destination address bytes)
3
Firmware length (n) high
4 through n + 2 Firmware
n + 3
Checksum for firmware (up to maximum supported ROM size)
2.6.3 Address and Length Download Configuration
Address Low Byte
Register 0xFD06
RAH[7:0]
RAL[7:0]
ACK
On a power-on reset or on a soft-chip reset (watchdog timer expires or
the RESET/ pin toggles), the download logic will download data
beginning at address 0x00 of the two-wire slave ROM device.
The first four bytes read from the two-wire external ROM contain the
download destination address and the number of bytes to be
downloaded. The first byte is the destination address low byte. The
second byte is the destination address high byte. The third byte is the
firmware length low byte, and the fourth byte is the firmware length high
byte. The firmware length is the number of bytes of code not including
the two bytes of destination address, or the two bytes of firmware length.
The length does include the final checksum byte. The minimum firmware
length is three bytes.
Two-Wire Serial Interface Operation
1 0 1 0 a b c
1
EEPROM
Chip
Device ID
Addr
ACK
ACK
Data Byte
Register 0xFD00
D[7:0]
(More data
bytes may be
transferred,
each followed
by an ACK)
No
ACK
ACK
Last Data Byte
Register 0xFD00
D[7:0]
2-17
Advertisement
Table of Contents
