LSI Symbios SYM53C040 Technical Manual page 150

Enclosure services processor
Table of Contents

Advertisement

8-24
Register: 0xFF35
Multipurpose LED Bank 0H Latch Mask (MLLM0H)
Read/Write
7
6
R
MLLM0_7
0
0
R
Reserved
MLLM0_[7:4] Multipurpose LED Bank 0H Latch Mask
The bits in this read/write register define the write mask
for the
(0xFF36) and the
(MLL0H)
bits allows the corresponding bit in MLL0L and MLL0H to
be modified.
Register: 0xFF36
Multipurpose LED Bank 0L Latch (MLL0L)
Read/Write
7
6
R
MLL0_3
0
x
R
Reserved
MLL0_[3:0]
Multipurpose LED Bank 0L Latch
The bits in this read/write register store the power-on
value of the I/O pins MPLED0_0, MPLED0_1,
MPLED0_2, and MPLED0_3. The values on these pins
are latched into this register on the deasserting edge of
the RESET/ input signal or the internal power-on reset.
System Registers
5
4
3
R
MLLM0_6
R
Default:
0
0
0
Multipurpose LED Bank 0L Latch (MLL0L)
Multipurpose LED Bank 0H Latch
register (0xFF37). A value of 1 in any of these
5
4
3
R
MLL0_2
R
Defaults:
0
x
0
2
1
MLLM0_5
R
MLLM0_4
0
0
[7, 5, 3, 1]
[6, 4, 2, 0]
register
2
1
MLL0_1
R
MLL0_0
x
0
[7, 5, 3, 1]
[6, 4, 2, 0]
0
0
0
x

Advertisement

Table of Contents
loading

Table of Contents