LSI Symbios SYM53C040 Technical Manual page 5

Chapter 8
Chapter 9
Appendix A
Figures
System Registers
Electrical Characteristics
9.1 Operating Requirements
9.2 3.3 Volt DC Specifications
9.3 AC Characteristics
9.3.1 Clock Timing
9.3.2 Reset Signal
9.4 Microcontroller Interface Timings
9.4.1 External Memory Interface
9.4.2 External Data Read Cycle
9.4.3 External Data Write Cycle
9.5 Multipurpose Register Access
9.6 Two-Wire Serial Timings
9.7 SFF-8067 Interface Timings
9.8 SCSI Timings
9.8.1 Initiator Asynchronous Send
9.8.2 Initiator Asynchronous Receive
9.8.3 Target Asynchronous Send
9.8.4 Target Asynchronous Receive
9.9 Mechanical Drawings
Register Summary
Index
Customer Feedback
1.1 SCSI/SAF-TE Enclosure Implementation
1.2 SFF-8067/SES Enclosure Implementation
2.1 SYM53C040 Block Diagram
2.2 SYM53C040 Memory Map
2.3 Initiating Arbitration and Selection/Reselection
2.4 LVD Resistor Value
Contents
9-2
9-3
9-7
9-7
9-8
9-9
9-9
9-10
9-11
9-12
9-13
9-14
9-16
9-16
9-17
9-18
9-19
9-20
1-2
1-3
2-2
2-5
2-7
2-8
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