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Table 4.1
SCSI and DMA Registers
31
Current SCSI Data (CSD)
Current SCSI Bus Status (CSBS)
Bus and Status (BSR)
Reset Parity/Interrupt (RPI)
4-2
Table
4.1, the register map, summarizes the SCSI and DMA registers in
graphical form.
16 15
(Read)
Initiator Command (ICR)
Mode (MR)
Target Command (TC)
(Read)
(Read)
Start DMA Target Receive (SDTR)
(Read)
Current SCSI Data High (CSDHI)
Reserved
Select Enable High (SENHI)
Reserved
DMA Status (DS)
DMA Transfer Length (DTL)
DMA Source/Destination Low (DSDL)
DMA Source/Destination High (DSDH)
DMA Interrupt (DMAI)
Reserved
SCSI and DMA Registers
Output Data (ODR)
Select Enable (SER)
DMA Send (DSR)
Start DMA Initiator Receive (SDIR)
0
(Write)
(Write)
(Write)
(Write)
0xFC09–0xFC0B
0xFC0D–0xFC0F
0xFC15–0xFC1F
Address
0xFC00
0xFC01
0xFC02
0xFC03
0xFC04
0xFC05
0xFC06
0xFC07
0xFC08
0xFC0C
0xFC10
0xFC11
0xFC12
0xFC13
0xFC14
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