LSI Symbios SYM53C040 Technical Manual page 7

Tables
2.1 Initial ROM Download Contents
2.2 Power-On Configuration Pins and Options
2.3 External Pull-up Values for Automatic Branch Generation
2.4 Serial ROM Chip Addresses
2.5 Register Bits for Interrupt Handling
2.6 Interrupt Handling
3.1 SYM53C040 160-Pin QFP Pin List (Alphabetically by
Signal Name)
3.2 SYM53C040 160-Pin QFP Pin List (Numerically by
Pin Number)
3.5 Miscellaneous Signals
3.6 SCSI Signals
3.7 JTAG Signals
3.8 Power and Grounds Signals
3.9 Pin Assignments for SFF-8067 Mode
4.1 SCSI and DMA Registers
4.2 SCSI Phase Bit Values
5.1 SFF-8067 Interface Registers
6.1 Two-Wire Serial Registers
7.1 Miscellaneous Registers
7.3 Possible Watchdog Timer Values (40 MHz Internal Clock)
8.1 System Registers
8.2 Automatic Branch Destination Address
8.3 Fast LED Blink Rates (40 MHz Internal Clock)
8.4 Slow LED Blink Rates (20 MHz Internal Clock)
8.5 LED Behavior
8.6 LED Bank 1 Behavior
8.7 LED Bank 2 Behavior
9.1 Absolute Maximum Stress Ratings
9.2 Operating Conditions
LVD Driver SCSI Signals-SD[7:0]+ SD[7:0] − , SDP0+,
9.3
SDP0 − , SREQ+, SREQ − , SACK/+, SACK/ − , SHID[2:0]+,
SHID[2:0] − , SMSG/+, SMSG/ − , SIO/+, SIO/ − , SCD/+,
SCD/ − , SATN/+, SATN/ − , SBSY/+, SBSY/ − , SSEL/+,
SSEL/ − , SRST/+, SRST/ −
Contents
2-17
2-21
2-22
2-23
2-28
2-33
3-3
3-4
3-9
3-13
3-16
3-17
3-18
4-2
4-9
5-2
6-2
7-2
7-4
8-2
8-5
8-7
8-7
8-21
8-25
8-29
9-2
9-2
9-3
vii