LSI Symbios SYM53C040 Technical Manual page 125

Enclosure services processor
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Register: 0xFE0E
Interrupt Destination (IDR)
Read/Write
7
6
IDR7
IDR6
0
0
These register bits provide the ability to route the corresponding
interrupts of the
Interrupt Status (ISR)
two external interrupt inputs of the microcontroller core. A value of 1
written to a bit in this register will route the corresponding interrupt in the
ISR register to the external interrupt 1 input of the microcontroller, and a
value of 0 written to a given bit will route the corresponding interrupt of
the ISR register to the external interrupt 0 input of the microcontroller.
IDR7
SCSI Interrupt
IDR6
Two-Wire Interface 1 Interrupt
IDR5
Two-Wire Interface 0 Interrupt
IDR4
DMA Interrupt
IDR3
Timer 2 Interrupt
IDR2
Timer 1 Interrupt
IDR1
8067 Port 1 Interrupt or MPIO3_1 Interrupt
IDR0
8067 Port 0 Interrupt or MPIO3_0 Interrupt
5
4
IDR5
IDR4
IDR3
Defaults:
0
0
register (0xFE04) to either of the
3
2
1
IDR2
IDR1
0
0
0
0
IDR0
0
7
6
5
4
3
2
1
0
7-15

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