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DWR/
DSK_WR/ Value
When this active low bit is cleared, the drive is ready to
write data to the SYM53C040.
RD/
DSK_RD/ Value
When this active low bit is cleared, the drive is ready to
read data from the SYM53C040.
ACK/
ENCL_ACK/ Value
This active low bit is cleared as an acknowledge signal
driven by the SYM53C040 in discovery, read, and write
operations.
D[3:0]
8067 Interface Data Nibble Bits
These bits contain the current data nibble for the D[3:0]
signals in read/write operations.
6
5
4
[3:0]
5-7
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