Table of Contents
Advertisement
Figure 2.3
Initiating Arbitration and Selection/Reselection
Write ID Bit to
Output Data Register
(Reg. 0xFC00)
Set ARB
(0xFC02 Bit 0)
Set AS_LVD
(0xFC02 Bit 7)***
Reset ARB
(0xFC02 Bit 0)
Check
Arb. In Prog. Bit
(0xFC01 Bit 6)
A
Wait 2.2 s
Arbitration Delay
Check
1
Lost Arb. Bit
(0xFC01 Bit 5)
Read 0xFC00 to See
If a Higher Priority ID
Is Present
Higher
Yes
Priority ID
Present
Reset SEL
(0xFC01 Bit 2)
0
1
0
?
No
B
SCSI Core Operation
B
Set Assert SEL/ Bit
(0xFC01 Bit 2)
Check
1
Lost Arb. Bit
(0xFC01 Bit 5)
0
Wait 1.2 µ s Min.
(Bus Clear + Settle)
Set Target Mode Bit
(0xFC02 Bit 6)*
A
Set TE
(0xFC03 Bit 1)***
Set Assert I_O/ Bit
(0xFC03 Bit 0)*
Write Target and
Initiator's ID Bits
to Output Reg.
(Reg. 0xFC00)
Assert BSY/ and
Assert Data Bus
(0xFC01 Bits 3, 0)
Reset ARB Bit
(0xFC02 Bit 0)
C
C
Reset Assert BSY/
Bit (0xFC01 Bit 3)
Selection/
No
Reselection
Complete?
**
Yes
BSY/
No
Asserted within
250 ms
?
Selection
Yes
Time-out
Reset the Select
Enable Register
(Reg. 0xFC04)
Set Assert BSY/
(0xFC01 Bit 3)*
Reset SEL/ and
Assert Data Bus
(0xFC01 Bits 2, 0)
Reset AS_LVD
(0xFC02 Bit 7)***
Information Transfer Phases
*
Reselection Only
**
Poll Interrupt
Request Active Bit or
wait for interrupt
*** LVD operation only
2-7
Advertisement
Table of Contents
