External Data Read Cycle - LSI Symbios SYM53C040 Technical Manual

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9.4.2 External Data Read Cycle

Figure 9.6
External Data Read Waveforms
ALE
PSEN/
RD/
AD[7:0]
ADDR
A[7:0]
ADDR
A[15:8]
ADDR
t
6
Table 9.15
External Data Read Timings
Symbol
Parameter
t
ALE to RD/ = Minimum delay from ALE falling to RD/ falling
8
t
RD/ pulse width = Minimum time RD/ is low
9
t
RD/ to valid data in = Maximum delay from RD/ falling to data valid
10
t
Data hold after RD/
11
t
Data float after RD/
12
t
Address Valid to ALE Falling = Minimum setup time for A[15:8] and
6
AD[7:0] to ALE falling
t
ALE Falling to Lower Address Valid = Maximum delay from ALE
7
falling to A[7:0] valid
9-10
t
8
t
10
t
7
ADDR
Electrical Characteristics
t
9
DATA IN
ADDR
ADDR
t
11
t
12
Min
Max
Units
50
ns
50
ns
48
ns
0
ns
5
ns
20
ns
10

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