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6-4
ICF2
ASF1
Examples:
1. A 40 MHz input clock and a maximum 400 kHz SCL output would
require D1*D0 to be greater than 100. A best fit would be for D1 to
be 32 and D0 to be 4. The value written into the register would be
0x15. This will yield a 312.5 kHz SCL output clock speed.
2. A 40 MHz input clock and a maximum 100 kHz SCL output would
require D1*D0 to be greater than 400. A best fit would be for D1 to
be 128 and D0 to be 4. The value written into the register would be
0x16. This would yield a 78.125 kHz SCL output clock speed.
Register: 0xFD00/0xFD02
Data (ES0, ES1, ES2 = 100)
Read/Write
7
6
D7
D6
0
0
D[7:0]
Data
This register is used for data transmission to and
reception from the Two-Wire Serial bus. During a transmit
operation, the data is sent out onto the Two-Wire Serial
bus after writing this register. During a receive operation,
Two-Wire Serial Registers
ICF1
0
x
1
0
1
0
1
1
1
1
ASF0
0
0
0
1
1
0
1
1
5
4
D5
D4
D3
Defaults:
0
0
ICF0
D0
x
2
0
3
1
4
0
5
1
8
D1
16
32
128
1024
3
2
1
D2
D1
0
0
0
0
D0
0
[7:0]
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