LSI Symbios SYM53C040 Technical Manual page 158

Enclosure services processor
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8-32
Register: 0xFF45
Multipurpose LED Bank 2H Latch Mask (MLLM2H)
Read/Write
7
6
R
MLLM2_7
0
0
R
Reserved
MLLM2_[7:4] Multipurpose LED Bank 2H Latch Mask
The bits in this read/write register define the write mask
for the
(0xFF3E) and the
(MLL2H)
bits allows the corresponding bit in MLL2L and MLL2H to
be modified.
Register: 0xFF46
Multipurpose LED Bank 2L Latch (MLL2L)
Read/Write
7
6
R
MLL2_3
0
x
R
Reserved
MLL2_[3:0]
Multipurpose LED Bank 2L Latch
These read/write register bits store the power-on value of
the I/O pins MPLED2_0, MPLED2_1, MPLED2_2, and
MPLED2_3. The values on these pins are latched into
this register on the deasserting edge of the RESET/ input
signal or the internal power-on reset.
System Registers
5
4
3
R
MLLM2_6
R
Defaults:
0
0
0
Multipurpose LED Bank 2L Latch (MLL2L)
Multipurpose LED Bank 2H Latch
register (0xFF3F). A value of 1 in any of these
5
4
3
R
MLL2_2
R
Defaults:
0
x
0
2
1
MLLM2_5
R
MLLM2_4
0
0
[7, 5, 3, 1]
[6, 4, 2, 0]
register
2
1
MLL2_1
R
MLL2_0
x
0
[7, 5, 3, 1]
[6, 4, 2, 0]
0
0
0
x

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