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8-28
Register: 0xFF3D
Multipurpose LED Bank 1H Latch Mask (MLLM1H)
Read/Write
7
6
R
MLLM1_7
0
0
R
Reserved
MLLM1_[7:4] Multipurpose LED Bank 1H Latch Mask
These read/write register bits define the write mask for
the
Multipurpose LED Bank 1L Latch (MLL1L)
(0xFF3E) and the
(MLL1H)
bits allows the corresponding bit in MLL1L and MLL1H to
be modified.
Register: 0xFF3E
Multipurpose LED Bank 1L Latch (MLL1L)
Read/Write
7
6
R
MLL1_3
0
x
R
Reserved
MLL1_[3:0]
Multipurpose LED Bank 1L Latch Mask
The bits in these read/write registers store the power-on
value of the I/O pins MPLED1_0, MPLED1_1,
MPLED1_2, and MPLED1_3. The values on these pins
are latched into this register on the deasserting edge of
the RESET/ input signal or the internal power-on reset.
System Registers
5
4
3
R
MLLM1_6
R
Defaults:
0
0
0
Multipurpose LED Bank 1H Latch
register (0xFF3F). A value of 1 in any of these
5
4
3
R
MLL1_2
R
Defaults:
0
x
0
2
1
MLLM1_5
R
MLLM1_4
0
0
[7, 5, 3, 1]
[6, 4, 2, 0]
register
2
1
MLL1_1
R
MLL1_0
x
0
[7, 5, 3, 1]
[6, 4, 2, 0]
0
0
0
x
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