Sym53C040 Sff-8067 Interface Control State Diagram - LSI Symbios SYM53C040 Technical Manual

2-26
Figure 2.13 SYM53C040 SFF-8067 Interface Control State Diagram
RESET/ or PESI/ High
8067
IDLE
SEL[6:0] =
PA[6:0]
Discovery
PESI/ Asserted
Phase (Low)
SEL[3:0] =
PA[3:0]
ENCL_ACK/
Asserted
DSK_RD/ & DSK_WR/
Asserted
SEL[3:0] &
ENCL_ACK/
Deasserted
DSK_RD/ & DSK_WR/ Deasserted
Signal Name Asserted
PESI/ (PARALLEL_ESI/) Drive
D[3:0] SYM53C040 or
Drive
ENCL_ACK/ SYM53C040
DSK_RD/ Drive
DSK_WR/ Drive
*Items marked with an asterisk require action
by the firmware. All other activities are part of
standard SFF-8067 interface operation.
Functional Description
DSK_RD/ Asserted
ENCL_ACK/
Deasserted
DSK_RD/ Deasserted
ENCL_ACK/
Asserted
D[3:0] =
RDATA[7:4]
Write RDATA Register*
Interrupt
RINT Bit = 1
(0xFC22,
Bit 1)*
DSK_RD Asserted
START
TRANSFER
DSK_WR/ Asserted
WDATA[7:4]
= D[3:0]
ENCL_ACK/
Asserted
DSK_WR/ Deasserted
ENCL_ACK/
Deasserted
DSK_WR/ Asserted
8067 Read
D[3:0]
RDATA[3:0]
ENCL_ACK/
Asserted
DSK_RD/ Deasserted
ENCL_ACK/
Deasserted
Read WDATA Register*
Interrupt
WINT Bit = 1
(0xFC22, Bit 0)*
ENCL_ACK/
Asserted
DSK_WR/ Deasserted
WRF Bit = 1
(0xFC22,
Bit 1)
WDATA[3:0]
= D[3:0]
ENCL_ACK/
Asserted
8067 Write