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8-10
Register: 0xFF0B
Multipurpose I/O Bank 0 Latch Mask (MPLM0)
Read/Write
7
6
MPLM0_7 MPLM0_6 MPLM0_5 MPLM0_4 MPLM0_3 MPLM0_2 MPLM0_1 MPLM0_0
1
1
MPLM0_[7:0] Multipurpose I/O Bank 0 Latch Mask
These read/write register bits define the write mask for
the
Multipurpose I/O Bank 0 Latch (MPL0)
(0xFF0C). A value of 1 in any of these bits allows the
corresponding bit in the MPL0 to be modified.
Register: 0xFF0C
Multipurpose I/O Bank 0 Latch (MPL0)
Read/Write
7
6
MPL0_7
MPL0_6
MPL0_5
x
x
MPL0_[7:0]
Multipurpose I/O Bank 0 Latch
These read/write register bits store the power-on value of
the I/O pins MPIO0_0, MPIO0_1, MPIO0_2, MPIO0_3,
MPIO0_4, MPIO0_5, MPIO0_6, and MPIO0_7. The
values on these pins are latched into this register on the
deasserting edge of the RESET/ input signal or the
internal power-on reset.
System Registers
5
4
3
Defaults:
1
1
1
5
4
3
MPL0_4
MPL0_3
Defaults:
x
x
x
2
1
1
1
register
2
1
MPL0_2
MPL0_1
MPL0_0
x
x
0
1
[7:0]
0
x
[7:0]
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