Automatic Branch Destination Address - LSI Symbios SYM53C040 Technical Manual

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power-on memory mapping configurations, the
SYM53C040 address decode logic will automatically
provide the first branch instruction to the microcontroller
whenever it fetches from address 0x0000 through
0x0002. The values in bits 0 and 1 define the destination
address for this branch instruction, according to
Table
addressing, see
Table 8.2 Automatic Branch Destination Address
The reset value of these bits matches the TTL voltage
levels on the AD0 and AD1 pins on reset. These pins
have internal pull-down resistors, so if no external pull-up
resistor is used, the reset value is 0, and the first
microcontroller instruction will be fetched from address
0x0000. If an external pull-up resistor is used, the reset
value is 1.
Register: 0xFF03
Power-On Configuration One (POC1)
Read Only
7
6
R
POC1_6
POC1_5
A15
A14
This register is not affected by a soft reset.
R
Reserved
This bit should remain clear (0) for normal operation.
POC1_6
Power-On Configuration 1_6
The reset value of this bit matches the TTL voltage level
on the A14 pin on reset.
8.2. For more information on automatic branch
Chapter
FIBD1
FIBD0
1
1
1
0
0
1
0
0
5
4
POC1_4
DLSEL
Defaults:
A13
A12
A11
2.
Branch Destination
0x8000
0x4000
0x0033
Fetched from 0x0000
3
2
1
DLADR2
DLADR1
A10
A9
0
DLADR0
A8
7
6
8-5

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