Jtag Boundary Scan Testing - LSI Symbios SYM53C040 Technical Manual

2.11 JTAG Boundary Scan Testing

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The SYM53C040 includes support for JTAG boundary scan testing in
accordance with the IEEE 1149.1 specification. The device can accept
all required boundary scan instructions, as well as the optional CLAMP,
HIGH-Z, and IDCODE instructions.
The SYM53C040 uses an 8-bit instruction register to support all
boundary scan instructions. The data registers included in the device are
the Boundary Data register, the IDCODE register, and the Bypass
register. The device can handle a 10 MHz TCK frequency for TDO and
TDI.
Functional Description