Table of Contents
Advertisement
Register: 0xFE09
Timer 2 Control (T2C)
Read/Write
7
6
T2EXP
T2RUN
0
0
T2EXP
Timer 2 Expired (read only)
A value of 1 in the T2EXP bit indicates that the timer has
expired and an interrupt has been generated if the T2IEN
bit was set when the timer expired. The interrupt can be
cleared by setting the T2CLR bit.
T2RUN
Timer 2 Run
A value of 1 in the T2RUN bit allows the timer to advance.
A value of 0 stops timer advancement.
T2CLR
Timer 2 Clear
A value of 1 in the T2CLR bit clears the timer. A value of
0 allows the timer to advance beyond the clear state.
T2PS
Timer 2 Prescaler
A value of 1 in the T2PS bit selects the additional divide
by 100 secondary divider chain, yielding a timer range of
0.5 ms to 128 ms with a resolution of 0.5 ms per step
(with a 40 MHz clock). A value of 0 bypasses the
secondary divider chain, yielding a timer range of 5 µ s to
1.280 ms with a resolution of 5 µ s per step.
R
Reserved
T2IEN
Timer 2 Interrupt Enable
A value of 1 in the T2IEN bit enables the timer's ability to
interrupt the microcontroller core (through the
Status (ISR)
cleared upon chip reset.
5
4
T2CLR
T2PS
Defaults:
0
0
register, 0xFE04) upon expiration. This bit is
3
1
R
x
x
x
0
T2IEN
0
7
6
5
4
[3:1]
0
Interrupt
7-11
Advertisement
Table of Contents
