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9.4.3 External Data Write Cycle
Figure 9.7
External Data Write Waveforms
ALE
PSEN/
WR/
AD[7:0]
ADDR
A[7:0]
ADDR
A[15:8]
ADDR
t
6
Table 9.16
External Data Write Timings
Symbol
Parameter
t
ALE to WR/ = Minimum delay from ALE falling to WR/
13
falling
t
WR/ pulse width = Minimum time WR/ is low
14
t
Data setup to WR/ = Minimum time data is valid prior to
15
WR/ rising
t
Data hold after WR/ = Minimum time data is valid after WR/
16
rising
t
Address Valid to ALE Falling = Minimum setup time for
6
A[15:8] and AD[7:0] to ALE falling
t
ALE Falling to Lower Address Valid = Maximum delay from
7
ALE falling to AD[7:0] valid
t
13
t
7
ADDR
Microcontroller Interface Timings
t
14
DATA
t
15
ADDR
ADDR
t
16
Min
Max
Units
50
–
ns
50
–
ns
50
–
ns
20
–
ns
20
–
ns
–
10
ns
9-11
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