Table of Contents
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C
C_D bit
4-9
checksum error bit
6-9
chip revision bits
7-6
CKSUM bit
6-9
clock register
6-3
command/data bit
4-9
configuration ROM download
control register reads
6-6
control register writes
6-5
CSBS register
4-9
CSDHI register
4-13
CTL0 bit
6-11
CTL1 bit
6-10
current SCSI bus status register
current SCSI data high register
current SCSI data register
D
D[3:0] bits
5-6
5-7
,
D[7:0]
6-4
data bits
6-4
data bus parity bit
4-10
data memory
2-3
data register
6-4
data transfer length bits
DB[7:0] bits
4-3
5-3
,
DBP bit
4-10
DC specifications
9-3
DIFFSENS
2-8
2-24
,
DLADR[2:0] bits
8-6
DLCFG bit
8-4
DLSEL bit
8-6
DM bit
4-7
DMA block
2-4
DMA core
initiating a DMA transfer
overview
2-4
send operation
2-13
DMA function
2-13
2-14
to
DMA handshaking
2-11
DMA interrupt bit
4-17
7-7
,
DMA interrupt register
4-17
DMA mode bit
2-11
4-7
,
DMA operation
2-27
DMA send register
4-12
DMA source/destination high register
DMA source/destination low register
DMA status
2-11
DMA status register
4-14
DMA target transfers
2-6
IX-2
2-16
4-9
4-13
4-3
4-15
2-11
7-14
7-15
,
,
4-16
4-16
Index
DMA transfer length
2-11
DMA transfer length register
DMA transfers
2-11
DMA_INT bit
7-7
DMAI register
4-17
download configuration select bit
download ROM address bits
download serial ROM bit
DS register
4-14
DSDH register
4-16
DSDL register
4-16
DSK_RD/ value bit
5-6
5-7
,
DSK_WR/ value bit
5-5
,
DTL register
4-15
DWR bit
5-5
DWR/ bit
5-7
E
EIEN bit
8-8
enable parity checking bit
enable parity interrupt bit
enable reset output bit
8-7
enable serial output bit
6-5
ENCL_ACK/ value bit
5-6
end of DMA transfer bit
4-10
ENI bit
6-5
6-7
,
EOD bit
4-10
EPC bit
4-6
EPI bit
4-6
ERO bit
8-7
ES[1:2] bits
6-5
6-7
,
ES0 bit
6-5
6-6
,
EXS0_INT bit
7-8
EXS1_INT bit
7-8
external interrupt enable bit
F
fast blink rate bits
8-7
FBR[1:0] bits
8-7
features summary
1-4
FIBD[1:0] bits
8-4
firmware requirements
2-11
first instruction branch destination bits
functional overview
2-1
functional pin description
H
halting a DMA operation
high impedance mode bit
4-15
8-6
8-6
8-4
5-7
4-6
4-6
6-6
,
5-7
,
6-5
6-7
8-8
,
,
8-4
3-8
2-11
7-6
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