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9.5 Multipurpose Register Access
9-12
The timings in
Table 9.17
and MPLED pins. Please refer to
specifying the operation of these pins.
Table 9.17
Multipurpose I/O and LED Timings
Parameter
Shared input setup
Shared input hold
CLK to output valid
Electrical Characteristics
apply to register accesses to control the MPIO
Chapter 2
for more information on
Min
20
10
20
Max
Units
–
ns
–
ns
–
ns
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