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Table 8.1
System Registers
31
Multipurpose I/O Bank 0 Pull-down Enable (MPPE0)
Multipurpose I/O Bank 1 Pull-down Enable (MPPE1)
Multipurpose I/O Bank 2 Pull-down Enable (MPPE2)
Multipurpose I/O Bank 3 Pull-down Enable (MPPE3)
8-2
Table
8.1, the register map, summarizes the System registers in
graphical form.
16 15
Reserved
Power-On Configuration Zero (POC0)
Reserved
Power-On Configuration One (POC1)
LED Blink Rate (LBR)
System Control (SYSCTRL)
Reserved
Multipurpose I/O Bank 0 Output (MPO0)
Multipurpose I/O Bank 0 Enable (MPE0)
Multipurpose I/O Bank 0 Input (MPI0)
Multipurpose I/O Bank 0 Latch Mask (MPLM0)
Multipurpose I/O Bank 0 Latch (MPL0)
Reserved
Multipurpose I/O Bank 1 Output (MPO1)
Multipurpose I/O Bank 1 Enable (MPE1)
Multipurpose I/O Bank 1 Input (MPI1)
Multipurpose I/O Bank 1 Latch Mask (MPLM1)
Multipurpose I/O Bank 1 Latch (MPL1)
Reserved
Multipurpose I/O Bank 2 Output (MPO2)
Multipurpose I/O Bank 2 Enable (MPE2)
Multipurpose I/O Bank 2 Input (MPI2)
Multipurpose I/O Bank 2 Latch Mask (MPLM2)
Multipurpose I/O Bank 2 Latch (MPL2)
Reserved
Multipurpose I/O Bank 3 Output (MPO3)
Multipurpose I/O Bank 3 Enable (MPE3)
Multipurpose I/O Bank 3 Input (MPI3)
Multipurpose I/O Bank 3 Latch Mask (MPLM3)
Multipurpose I/O Bank 3 Latch (MPL3)
Reserved
Multipurpose LED Bank 0L Output (MLO0L)
Multipurpose LED Bank 0H Output (MLO0H)
Multipurpose LED Bank 0L Input (MLI0L)
System Registers
0
Address
0xFF00
0xFF01
0xFF02
0xFF03
0xFF04
0xFF05
0xFF06–0xFF07
0xFF08
0xFF09
0xFF0A
0xFF0B
0xFF0C
0xFF0D
0xFF0E–oxFF0F
0xFF10
0xFF11
0xFF12
0xFF13
0xFF14
0xFF15
0xFF16–0xFF17
0xFF18
0xFF19
0xFF1A
0xFF1B
0xFF1C
0xFF1D
0xFF1E–0xFF1F
0xFF20
0xFF21
0xFF22
0xFF23
0xFF24
0xFF25
0xFF26–0xFF29
0xFF30
0xFF31
0xFF32
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