LSI LSI53C810A Manuals

Manuals and User Guides for LSI LSI53C810A. We have 1 LSI LSI53C810A manual available for free PDF download: Technical Manual

LSI LSI53C810A Technical Manual

LSI LSI53C810A Technical Manual (238 pages)

PCI to SCSI I/O Processor

Brand: LSI | Category: Computer Hardware | Size: 1 MB

Table of Contents

Table of Contents
7
Chapter 1 General Description

13
- Tolerant ® Technology
  14
- LSI53C810A Beneﬁts Summary
  15
  - SCSI Performance
    15
  - PCI Performance
    16
  - Integration
    16
  - Ease of Use
    16
  - Flexibility
    17
  - Reliability
    17
  - Testability
    18
- LSI53C810A System Diagram
  19
- LSI53C810A Chip Block Diagram
  20
Chapter 2 Functional Description

21
- SCSI Core
  21
  - DMA Core
    22
- SCRIPTS Processor
  22
  - SDMS Software: the Total SCSI Solution
    23
- Prefetching SCRIPTS Instructions
  23
  - Opcode Fetch Burst Capability
    24
- PCI Cache Mode
  24
  - Load and Store Instructions
    25
  - V/5 V PCI Interface
    25
  - Loopback Mode
    25
- Parity Options
  25
- SCSI Parity Errors and Interrupts
  27
  - Dma Fifo
    28
- DMA FIFO Sections
  28
- LSI53C810A Host Interface Data Paths
  30
- SCSI Bus Interface
  31
  - Terminator Networks
    31
  - Select/Reselect During Selection/Reselection
    31
- Active or Regulated Termination
  32
  - Synchronous Operation
    33
- Interrupt Handling
  35
  - Polling and Hardware Interrupts
    35
- Determining the Synchronous Transfer Rate
  35
Chapter 3 PCI Functional Description

43
- PCI Addressing
  43
  - Conﬁguration Space
    43
  - PCI Bus Commands and Functions Supported
    44
- PCI Cache Mode
  45
  - Support for PCI Cache Line Size Register
    45
  - Selection of Cache Line Size
    46
  - Alignment
    46
  - Memory Read Multiple Command
    49
  - Unsupported PCI Commands
    50
- Conﬁguration Registers
  51
- PCI Bus Commands and Encoding Types
  51
- PCI Conﬁguration Register Map
  52
Chapter 4 Signal Descriptions

63
- PCI Bus Interface Signals
  63
- LSI53C810A Pin Diagram
  64
- Power and Ground Signals
  65
  - Address and Data Signals
    66
  - Interface Control Signals
    66
  - Error Reporting Signals
    66
  - Additional Interface Signals
    66
- Functional Signal Grouping
  66
  - Address and Data Signals
    67
  - PCI Bus Interface Signals
    67
- System Signals
  67
- Address and Data Signals
  68
- Interface Control Signals
  69
- Arbitration Signals
  70
- Error Reporting Signals
  70
- Additional Interface Signals
  71
- SCSI Bus Interface Signals
  71
- Additional Interface Signals
  72
Chapter 5 Operating Registers

75
Chapter 6 Instruction Set of the

141
- Low Level Register Interface Mode
  141
- Scsi Scripts
  141
- Scsi Scripts
  142
- Block Move Instructions
  143
  - Sample Operation
    143
- SCRIPTS Instructions
  143
- SCRIPTS Overview
  145
  - Block Move Instructions
    145
  - First Dword
    146
  - Second Dword
    146
- Block Move Instruction Register
  148
- I/O Instruction
  151
- Second Dword
  152
- Read/Write Instructions
  153
- I/O Instruction Register
  156
  - Read/Write Instructions
    163
  - Read-Modify-Write Cycles
    163
  - Move To/From SFBR Cycles
    164
- Read/Write Register Instruction
  165
- Read/Write Instructions
  165
- Read/Write Instructions
  166
- Transfer Control Instructions
  167
- Transfer Control Instruction
  170
- Memory Move Instructions
  176
- Memory to Memory Move Instruction
  177
  - Third Dword
    178
- Load and Store Instructions
  179
- Load and Store Instruction Format
  182
- PCI Interface Timing Diagrams
  183
- Tolerant Technology
  183
Chapter 7 Electrical Characteristics

183
- DC Characteristics
  183
- AC Characteristics
  183
- SCSI Signals-SMSG, SI_O/, SC_D/, SATN/, SBSY/, SSEL/, SRST
  185
- Capacitance
  186
- Irdy/, Trdy/, Devsel/, Stop/, Perr/, Par/
  187
  - Bidirectional Signals—Gpio0_Fetch GPIO1_MASTER/
    188
  - Tolerant Technology
    188
- Tolerant Technology Electrical Characteristics
  189
- Rise and Fall Time Test Conditions
  190
- Hysteresis of SCSI Receiver
  190
- SCSI Input Filtering
  190
- Output Current as a Function of Output Voltage
  191
- Input Current as a Function of Input Voltage
  191
- Clock Timing
  192
- Reset Input Timing
  193
- Reset Input
  193
- Interrupt Output Waveforms
  193
- Pci Interface Timing Diagrams
  194
  - Target Timing
    194
  - Initiator Timing
    194
- PCI Conﬁguration Register Read
  195
- PCI Conﬁguration Register Write
  196
- Target Read
  197
- Target Write
  198
- Opcode Fetch, Nonburst
  199
- Burst Opcode Fetch
  200
- Back-To-Back Read
  201
- Back-To-Back Write
  202
- Burst Read
  204
- Burst Write
  206
- PCI Timing
  208
- SCSI Timings
  209
- Initiator Asynchronous Send
  209
- Initiator Asynchronous Receive
  210
- Target Asynchronous Send
  211
- Target Asynchronous Receive
  212
- Initiator and Target Synchronous Transfers
  212
- SCSI-2 Fast Transfers (10.0 Mbytes/S (8-Bit Transfers 40 Mhz Clock)
  213
- SCSI-1 Transfers (SE, 5.0 Mbytes/S)
  213
  - SCSI-2 Fast Transfers (10.0 Mbytes/S (8-Bit Transfers 50 Mhz Clock)
    214
  - Package Drawings
    215
- LD PQFP (UD) Mechanical Drawing (Sheet 1 of 2)
  216
- A.1 Conﬁguration Registers
  219
Appendix A Register Summary

219
- A.2 SCSI Registers
  220
- Customer Feedback
  231

Advertisement

Advertisement

Related Products

LSI Categories

Controller Host Adapter Computer Hardware Adapter PCI Card

More LSI Manuals