LSI Symbios SYM53C040 Technical Manual page 124

Enclosure services processor
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7-14
IMR5
Two-Wire Interface 0 Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
IMR4
DMA Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
IMR3
Timer 2 Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
IMR2
Timer 1 Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
IMR1
8067 Port 1 Interrupt or MPIO3_1 Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
IMR0
8067 Port 0 Interrupt or MPIO3_0 Interrupt
Clearing this bit masks this interrupt. Setting this bit
enables the interrupt.
Miscellaneous Registers
5
4
3
2
1
0

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