LSI Symbios SYM53C040 Technical Manual page 188

Enclosure services processor
Table of Contents

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Table A.1
Register Summary by Description (Cont.)
Description
Multipurpose LED Bank 2L Latch (MLL2L)
Multipurpose LED Bank 2L Latch Mask (MLLM2L)
Multipurpose LED Bank 2L Output (MLO2L)
Output Data (ODR)
Own Address (ES0, ES1, ES2 = 000)
Physical Address (PHAD0/PHAD1)
Port Control/Status (PCST0/PCST1)
Power-On Configuration One (POC1)
Power-On Configuration Zero (POC0)
Read Data (RDATA0/RDATA1)
Reset Parity/Interrupt (RPI)
Select Enable (SER)
Select Enable High (SENHI)
Start DMA Initiator Receive (SDIR)
Start DMA Target Receive (SDTR)
Status Register Reads (ES0 = 1)
System Control (SYSCTRL)
Target Command (TC)
Timer 1 Control (T1C)
Timer 1 Final Chain (T1FC)
Timer 1 Secondary Chain (T1SC)
Timer 1 Threshold (T1TH)
Timer 2 Control (T2C)
Timer 2 Final Chain (T2FC)
Timer 2 Secondary Chain (T2SC)
A-4
Register Summary
Address
R/W
0xFF46
Read/Write
0xFF44
Read/Write
0xFF40
Read/Write
0xFC00
Write Only
0xFD00/0xFD02
Read/Write
0xFC23/0xFC2B
Read Only
0xFC22/0xFC2A
Read/Write
0xFF03
Read Only
0xFF01
Read Only
0xFC20/0xFC28
Read/Write
0xFC07
Read Only
0xFC04
Write Only
0xFC0C
Write Only
0xFC07
Write Only
0xFC06
Write Only
0xFD01/0xFD03
Read Only
0xFF05
Read/Write
0xFC03
Read/Write
0xFE05
Read/Write
0xFE08
Read Only
0xFE07
Read Only
0xFE06
Read/Write
0xFE09
Read/Write
0xFE0C
Read Only
0xFE0B
Read Only
Page #
8-32
8-31
8-29
4-3
6-3
5-5
5-3
8-5
8-4
5-3
4-12
4-10
4-13
4-12
4-12
6-8
8-7
4-8
7-8
7-10
7-10
7-9
7-11
7-13
7-12

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