Non-Maskable Interrupt Control Register - Panasonic MN103S User Manual

Chapter 5
Interrupt Controller
5.2.4

Non-Maskable Interrupt Control Register

If a NMI interrupt request is issued, The flag corresponding to the request is set. After the NMI interrupt request is
accepted, the flag is cleared by software in the NMI interrupt processing program. When the flag is set to "1", the
flag can be cleared by writing "1". Table: 5.2.5 shows the relationship between the flag status, the data written to
the flag, and the flag status after the data is written.
Table:5.2.5 Changes of Interrupt Request Flags
Flag status before write
0
0
1
1
Non-maskable Interrupt Control Register (NMICR: 0x00008900) [8, 16-bit access register]
bp 15
Flag -
At reset 0
Access R
bp Flag
15-3 -
2 SYSEF
1 WDIF
0 -
NMI cannot be generated by software.
..
..
V - 12 Control Registers
Write data
0
1
0
1
14 13 12 11 10
- - - - -
0 0 0 0 0
R R R R R
Description
-
System error interrupt request flag
Watchdog timer overflow interrupt
request flag
-
Flag status after write
0
0
1
0
9 8 7 6 5
- - - - -
0 0 0 0 0
R R R R R
Set condition
-
0: No interrupt request
1: Interrupt request
0: No interrupt request
1: Interrupt request
-
Flag change
No change
No change
No change
Flag cleared
4 3 2 1
- - WDIF
SYSEF
0 0 0 0
R R R/W R/W
0
-
0
R