Programmable Timer Registers - Panasonic MN103S User Manual

9.2.3

Programmable Timer Registers

Timer 8 to timer 11 each have 16-bit programmable timer registers. Programmable timer registers are composed
of the binary counter (TMnBC), the compare/capture A register (TMnCA) and the compare/capture B register
(TMnCB).
Timer 8 Binary Counter (TM8BC: 0x0000A210) [16-bit Access Register]
bp 15 14
Flag TM TM
BC15 BC14
At reset 0 0
Access R R
This is a binary counter of timers and a 16-bit readable only register. Table:9.2.2 shows updated timing (0x0000
clear, etc.) of the binary counter.
Table:9.2.2 The Updated Timing of Binary Counter and Update Value
When initializing a timer (when the TMLDE
flag of the TMnMD register is set to "1")
Count clock up (down)
TMnBC overflow
TMnBC underflow
Count up (down) from the TMnBC and the
TMnCA match
Count up (down) from the TMnBC and the
TMnCB match
At the TMnCA capture
At the TMnCB capture
13 12 11 10
TM TM TM TM
BC13 BC12 BC11 BC10
0 0 0 0
R R R R
TMCLE flag (TMnMD)=0
TMnBC←0x0000
TMnBC←TMnBC+1
(TMnBC←TMnBC-1)
TMnBC←0x0000
TMnBC←0xFFFF
TMnBC←TMnBC+1
(TMnBC←TMnBC-1)
No change
No change
No change
9 8 7 6
TM TM TM TM
BC9 BC8 BC7 BC6
0 0 0 0
R R R R
5 4 3 2
TM TM TM TM
BC5 BC4 BC3 BC2
0 0 0 0
R R R R
TMCLE flag (TMnMD)=1
TMnBC←0x0000
TMnBC←TMnBC+1
(TMnBC←TMnBC-1)
TMnBC←0x0000
TMnBC←0xTMnCA
TMnBC←0x0000
No change
TMnBC←0x0000
No change
Control registers
Chapter 9
16-bit Timer
1 0
TM TM
BC1 BC0
0 0
R R
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