Programmable Timer Registers - Panasonic MN103S User Manual

8.2.3

Programmable Timer Registers

Timer 0 to timer 7,timer 14 to timer 17 each have 8-bit programmable timer registers.
Programmable timer registers consist of the base register and binary counter.
Timer n base registers set the initial value of the timer n binary counter (TMnBC) and the underflow period. The
value of timer n base register (TMnBR) setting is loaded into TMnBC under the following conditions:
• when the TMnLDE flag of the timer n mode register (TMnMD) = 1
• when an underflow occurs
Timer n binary counters are 8-bit readable registers. The counter values can be read.
Timer 0 Base Register (TM0BR: 0x0000A188) [8-bit Access Register]
bp 7 6
Flag TM0 TM0
BR7 BR6
At reset 0 0
Access R/W R/W
Timer 1 Base Register (TM1BR: 0x0000A189) [8-bit Access Register]
bp 7 6
Flag TM1 TM1
BR7 BR6
At reset 0 0
Access R/W R/W
Timer 2 Base Register (TM2BR: 0x0000A18C) [8-bit Access Register]
bp 7 6
Flag TM2 TM2
BR7 BR6
At reset 0 0
Access R/W R/W
Timer 3 Base Register (TM3BR: 0x0000A18D) [8-bit Access Register]
bp 7 6
Flag TM3 TM3
BR7 BR6
At reset 0 0
Access R/W R/W
5 4 3 2
TM0 TM0 TM0 TM0
BR5 BR4 BR3 BR2
0 0 0 0
R/W R/W R/W R/W
5 4 3 2
TM1 TM1 TM1 TM1
BR5 BR4 BR3 BR2
0 0 0 0
R/W R/W R/W R/W
5 4 3 2
TM2 TM2 TM2 TM2
BR5 BR4 BR3 BR2
0 0 0 0
R/W R/W R/W R/W
5 4 3 2
TM3 TM3 TM3 TM3
BR5 BR4 BR3 BR2
0 0 0 0
R/W R/W R/W R/W
1 0
TM0 TM0
BR1 BR0
0 0
R/W R/W
1 0
TM1 TM1
BR1 BR0
0 0
R/W R/W
1 0
TM2 TM2
BR1 BR0
0 0
R/W R/W
1 0
TM3 TM3
BR1 BR0
0 0
R/W R/W
Chapter 8
8-bit Timer
Control Registers VIII - 13