Panasonic MN103S User Manual page 331

Hide thumbs Also See for MN103S:

Table of Contents

Double Buffer Load Timing

Double buffer load can be enabled by the PCRAEN flag and PCRBEN flag of the PWMMDn register. Table:

10.3.5 shows the relationship between the double buffer load timing and enable setting flag.

Table:10.3.5 Double Buffer Load Timing and Enable Setting Flag

At PWM binary counter underflow

At PWM binary counter overflow

Triangular wave(WAVEMDn=0)

Period setting

Setting Interrupt Timing

Interrupt signal can be generated in synchronization with the PWM period. Interrupt signal generation timing is at

the PWM period underflow and overflow. Table: 10.3.6 shows the relationship between the interrupt timing and

the enable setting flag.

Table:10.3.6 Interrupt Timing and Enable Setting Flag

At PWM binary counter underflow

At PWM binary counter overflow

Flag (Register)

PCRAEN(PWMMDn)

PCRBEN(PWMMDn)

PWM count value

Figure:10.3.3 Double Buffer Load TIming

Flag (Register)

INTAEN (PWMMDn)

INTBEN (PWMMDn)

Saw-tooth wave(WAVEMDn= 1)

PWM count value

Motor Control PWM

Show Quick Links

Table of Contents

Mn103sa7d Mn103sa7g