Reset Control Register - Panasonic MN103S User Manual

Chapter 11
Watchdog Timer
11.2.4

Reset Control Register

Reset control register is used to generate a self-reset (internal reset).
Reset Control Register (RSTCTR: 0x00008204) [8,16-bit Access Register]
bp 7
Flag
-
At reset 0
Access R
bp Flag
7-1 -
0 CHIPRST
XI - 6 Control Registers
6 5 4 3
- - - -
0 0 0 0
R R R R
Description
-
Self-reset (internal reset)
2 1 0
CHIP
- -
RST
0 0 0
R R R/W
Setting condition
-
A self-reset is generated when this flag is overwritten from "0" to "1".
A self-reset is not generated if this flag is set to "1" when it contains
"1". This flag value is retained even after the self-reset. The
CHIPRST flag is cleared either by an external reset signal or when
"0" is written to this flag by the program.