Panasonic MN103S User Manual page 330

Chapter 10
Motor Control PWM
Double Buffer
Each of the PWM registers is double-buffered to allow data changes during PWM operation. Registers read from
and written to by the microcontroller are independent of registers referenced by the PWM. This makes it possible
for microcontroller's register values to be loaded into PWM's registers in synchronization with PWM period. The
PWM mode register (PWMMDn) is single-buffered as it is a basic register that controls PWM operation mode.
However, double buffer and single buffer are selectable with all other PWM control registers. Therefore, the con-
figuration that best suits the application can be selected. Check the PWM control register list for buffer configura-
tion. Double buffer load timing can be set by overflow and underflow of PWM period.The PWMMDn register
can be used to enable or disable either of these timings. Data in all double buffers for control registers is loaded
into a PWM at the same timing. However, this timing can be specified separately for each PWM. If the PWMn
binary counter is stopped with counting operation disabled, the double buffer values are directly loaded into
PWM registers.
Table:10.3.4 Buffer Configuration Available with PWM Control Registers
Register
PWMMDn
OUTMDn
PWMSELn
PWMSETn
TCMPnA
TCMPnB
TCMPnC
DTMSETn
PWMDCNTn
PWMOFF
X - 22 Operation
Double-buffered Single-buffered
-
O
O
O
O
O
O
O
O
-
Remarks
O
Switching by the SDSLAn flag in the PWMMDn
O
register
Switching by the SDSLBn flag in the PWMMDn
O
register
-
-
-
-
-
-
O